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Ganesh C. Patil
ORCID
Publication Activity (10 Years)
Years Active: 2011-2019
Publications (10 Years): 1
Top Topics
Delay Insensitive
Schottky Barrier
Mixed Signal
Vlsi Circuits
Top Venues
Microelectron. J.
IET Circuits Devices Syst.
Microelectron. Reliab.
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Publications
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Ramarao Garike
,
Ganesh C. Patil
dual-k spacer bulk planar junctionless transistor for mixed signal integrated circuits.
IET Circuits Devices Syst.
13 (1) (2019)
Ganesh C. Patil
,
Shafi Qureshi
Engineering buried oxide in dopant-segregated Schottky barrier SOI MOSFET for nanoscale CMOS circuits.
Microelectron. Reliab.
53 (3) (2013)
Ganesh C. Patil
,
S. Qureshi
Underlap channel metal source/drain SOI MOSFET for thermally efficient low-power mixed-signal circuits.
Microelectron. J.
43 (5) (2012)
Ganesh C. Patil
,
Shafi Qureshi
Asymmetric Drain Underlap Schottky Barrier SOI MOSFET for Low-Power High Performance Nanoscale CMOS Circuits.
ISVLSI
(2011)