Fei Yuan

Publication Activity (10 Years)

Years Active: 2007-2023
Publications (10 Years): 46

Top Topics

Signal Processing

Associative Memory

Fine Granularity

Top Venues

IET Circuits Devices Syst.

Microelectron. J.

Publications

Daniel Junehee Lee, Fei Yuan, Yushi Zhou
A Cyclic Vernier Digital-to-Time Converter for Time-Mode Successive Approximation TDC. MWSCAS (2023)
Fei Yuan, Parth Parekh, Yushi Zhou
Bi-Directional Gated Ring Oscillator Time Integrator. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (9) (2023)
Parth Parekh, Fei Yuan, Yushi Zhou
Gated Vernier delay line time integrator with applications in ΔΣ time-to-digital converter. Microelectron. J. 119 (2022)
Parth Parekh, Fei Yuan, Yushi Zhou
Bi-Directional Gated Ring Oscillator Time Integrator for Time-Based Mixed-Signal Processing. MWSCAS (2022)
Fei Yuan
Metastability Correction Techniques for TSPC-DFF with Applications in Vernier TDC. ISCAS (2022)
Parth Parekh, Fei Yuan, Yushi Zhou
Improved Metastability of True Single-Phase Clock D-Flipflops With Applications in Vernier Time-to-Digital Converters. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (3) (2022)
Fei Yuan
Metastability Error Correction for True Single-Phase Clock DFF With Applications in Vernier TDC. IEEE Trans. Circuits Syst. II Express Briefs 69 (11) (2022)
Parth Parekh, Fei Yuan, Yushi Zhou
All-Digital Bi-Directional Gated Ring Oscillator Time Integrator for Mixed-Mode Signal Processing. NEWCAS (2022)
Daniel Junehee Lee, Fei Yuan, Yushi Zhou
All-Digital Successive Approximation TDC in Time-Mode Signal Processing. ISCAS (2021)
Daniel Junehee Lee, Fei Yuan, Gul N. Khan, Yushi Zhou
An 8-bit digital-to-time converter with pre-skewing and time interpolation. IET Circuits Devices Syst. 15 (7) (2021)
Parth Parekh, Fei Yuan, Yushi Zhou
Gated Vernier Delay Line Time Integrator for Time-Mode Signal Processing. MWSCAS (2021)
Daniel Junehee Lee, Fei Yuan, Yushi Zhou
Successive Approximation Register TDC in Time-Mode Signal Processing. MWSCAS (2021)
Daniel Junehee Lee, Fei Yuan, Yushi Zhou
All-digital successive approximation TDC in time-mode signal processing. Microelectron. J. 114 (2021)
Yue Li, Fei Yuan
Adaptive data-transition decision feedback equaliser with edge emphasis. IET Circuits Devices Syst. 15 (4) (2021)
Yue Li, Fei Yuan
All-digital power-efficient integrating frequency difference-to-digital converter for GHz frequency-locking. IET Circuits Devices Syst. 14 (8) (2020)
Parth Parekh, Fei Yuan, Yushi Zhou
Area/Power-Efficient True-Single-Phase-Clock D-Flipflops with Improved Metastability. MWSCAS (2020)
Fei Yuan, Parth Parekh
Time-based all-digital Δ Σ time-to-digital converter with pre-skewed bi-directional gated delay line time integrator. IET Circuits Devices Syst. 14 (1) (2020)
Parth Parekh, Fei Yuan, Yushi Zhou
All-Digital Time Integrator Using Bi-Directional Gated Vernier Delay Line. MWSCAS (2020)
Fei Yuan, Parth Parekh
Analysis and Design of an All-Digital ∆Σ TDC via Time-Mode Signal Processing. IEEE Trans. Circuits Syst. II Express Briefs (6) (2020)
Rashed Siddiqui, Fei Yuan, Yushi Zhou
A 500-MS/s 8.4-ps Double-Edge Successive Approximation TDC in 65 nm CMOS. MWSCAS (2019)
Yue Li, Fei Yuan
-LMS data-transition decision feedback equaliser. IET Circuits Devices Syst. 13 (7) (2019)
Yue Li, Fei Yuan
Data-Transition Decision Feedback Equalizer with Edge-Emphasis Taps and Raised References. NEWCAS (2019)
Yue Li, Fei Yuan
A Pre-Skewed Bi-Directional Gated Delay Line Bang-Bang Frequency Detector with Applications in 10 Gbps Serial Link Frequency-Locking. MWSCAS (2019)
Fei Yuan, Parth Parekh
Time-Mode All-Digital Delta-Sigma Time-to-Digital Converter with Process Uncertainty Calibration. MWSCAS (2019)
Daniel Junehee Lee, Fei Yuan, Gul N. Khan
Digitally Interpolated Pre-Skewed Delay-Line Digital-to-Time Converter with Minimum Nonlinearity and Latency. MWSCAS (2019)
Fei Yuan, Parth Parekh
All-Digital ∆Σ TDC with Current-Starved Bi-Directional Gated Delay Line Time Integrator. MWSCAS (2019)
Yue Li, Fei Yuan
-LMS Adaptation Algorithm. NEWCAS (2018)
Yushi Zhou, Jared Mercier, Fei Yuan
A Comparative Study Of Injection Locked Frequency Divider Using Harmonic Mixer In Weak And Strong Inversion. MWSCAS (2018)
Muhammad Obaidullah, Gul N. Khan, Fei Yuan
Multi-Swarm based NoC Configuration and Synthesis. NORCAS (2018)
Young Jun Park, Parth Parekh, Fei Yuan
All-digital ΔΣ time-to-digital converter with Bi-Directional gated delay line time integrator. Microelectron. J. 81 (2018)
Parth Parekh, Fei Yuan
Power-Silicon Efficient All-Digital △Σ TDC with Differential Gated Delay Line Time Integrator. NEWCAS (2018)
Fei Yuan
Design techniques of all-digital arithmetic units for time-mode signal processing. IET Circuits Devices Syst. 12 (6) (2018)
Young Jun Park, Fei Yuan
All-digital ΔΣ TDC with differential bi-directional gated-delay-line time integrator. MWSCAS (2017)
Yue Li, Fei Yuan
Adaptive data-transition decision feedback equalizer for serial links. MWSCAS (2017)
Young Jun Park, Fei Yuan
1-1 MASH ΔΣ time-to-digital converter with differential cascode time integrator. MWSCAS (2017)
Young Jun Park, Fei Yuan
Two-step pulse-shrinking time-to-digital converter. Microelectron. J. 60 (2017)
Yushi Zhou, Fei Yuan
Adaptive 4PAM decision feedback equalizer with reduced number of slicers. MWSCAS (2017)
Yue Li, Fei Yuan
Data-transition adaptive decision feedback equalizer for 2/4PAM serial links. MWSCAS (2017)
Young Jun Park, Fei Yuan
Low-power all-digital ΔΣ TDC with bi-directional gated delay line time integrator. MWSCAS (2017)
Young Jun Park, Durand Jarrett-Amor, Fei Yuan
Time integrator for mixed-mode signal processing. ISCAS (2016)
Durand Jarrett-Amor, Young Jun Park, Fei Yuan
Time-mode techniques for fast-locking phase-locked loops. ISCAS (2016)
Durand Jarrett-Amor, Fei Yuan
Data transient insensitive phase-locked loops. NEWCAS (2016)
Young Jun Park, Fei Yuan
A 12.88 MS/s 0.28 pJ/conv.step 8-bit stage-interleaved pulse-shrinking time-to-digital converter in 130 nm CMOS. MWSCAS (2015)
Yushi Zhou, Fei Yuan
Study of injection-locked non-harmonic oscillators using Volterra series. IET Circuits Devices Syst. 9 (2) (2015)
Young Jun Park, Fei Yuan
0.25-4 ns 185 MS/s 4-bit pulse-shrinking time-to-digital converter in 130 nm CMOS using a 2-step conversion scheme. MWSCAS (2015)
Yushi Zhou, Norman M. Filiol, Fei Yuan
A Quadrature Charge-Domain Sampling Mixer With Embedded FIR, IIR, and N-Path Filters. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2015)
Yushi Zhou, Norm M. Filiol, Shaul Peker, Fei Yuan
Low-power programmable charge-domain sampler with embedded N-path bandpass filter for software-defined radio. ISCAS (2013)
Anita Tino, Gul N. Khan, Fei Yuan
Towards Hardware Realizations of Intelligent Systems: A Cortical Column Approach. ICPP (2013)
Anita Tino, Gul N. Khan, Fei Yuan
Hardware realization of GALS based cortical column systems. AHS (2013)
Fei Yuan, Yushi Zhou
Frequency-Domain Study of Lock Range of Non-Harmonic Oscillators With Multiple Multi-Tone Injections. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2013)
Fei Yuan, Yushi Zhou
A frequency-domain study of lock range of harmonic oscillators with multiple injections. NEWCAS (2012)
Fei Yuan, Yushi Zhou
A Phasor-Domain Study of Lock Range of Harmonic Oscillators With Multiple Injections. IEEE Trans. Circuits Syst. II Express Briefs (8) (2012)
Yushi Zhou, Fei Yuan
A Study of the Lock Range of Injection-Locked CMOS Active-Inductor Oscillators Using a Linear Control System Approach. IEEE Trans. Circuits Syst. II Express Briefs (10) (2011)
Gul N. Khan, Jack Yu, Fei Yuan
XTEA Based Secure Authentication Protocol for RFID Systems. ICCCN (2011)
Jack Yu, Gul N. Khan, Fei Yuan
XTEA encryption based novel RFID security protocol. CCECE (2011)
Yong Chen, Fei Yuan, Gul N. Khan
A wide dynamic range CMOS image sensor with pulse-frequency-modulation and in-pixel amplification. Microelectron. J. 40 (10) (2009)
Dominic DiClemente, Fei Yuan
A Wide Frequency Tuning Range Active-inductor Voltage-controlled Oscillator for Ultra Wideband Applications. ISCAS (2009)
Dominic DiClemente, Fei Yuan, Adrian Tang
Current-Mode Phase-Locked Loops With CMOS Active Transformers. IEEE Trans. Circuits Syst. II Express Briefs (8) (2008)
Adrian Tang, Fei Yuan, Eddie Law
A New CMOS Active Transformer QPSK Modulator With Optimal Bandwidth Control. IEEE Trans. Circuits Syst. II Express Briefs (1) (2008)
Adrian Tang, Fei Yuan, Eddie Law
A new WiMAX sigma-delta modulator with constant-Q active inductors. ISCAS (2008)
Dominic DiClemente, Fei Yuan
Current-Mode Phase-Locked Loops with Low Supply Voltage Sensitivity. ISCAS (2007)
Adrian Tang, Fei Yuan, Eddie Law
A New CMOS BPSK Modulator with Optimal Transaction Bandwidth Control. ISCAS (2007)
Dominic DiClemente, Fei Yuan
Current-Mode Phase-Locked Loops - A New Architecture. IEEE Trans. Circuits Syst. II Express Briefs (4) (2007)