Low-power all-digital ΔΣ TDC with bi-directional gated delay line time integrator.

Young Jun Park Fei Yuan

Published in: MWSCAS (2017)

Keyphrases

low power
bi directional
mixed signal
power consumption
low cost
high speed
vlsi circuits
multi channel
digital signal processing
high power
low power consumption
associative memory
single chip
wireless transmission
cmos technology
vlsi architecture
english chinese
neural network
logic circuits
machine learning