Erfan Azarkhish

ORCID

Publication Activity (10 Years)

Years Active: 2013-2022
Publications (10 Years): 12

Top Venues

CoRR

IEEE Trans. Very Large Scale Integr. Syst.

3DIC

ACM Trans. Embed. Comput. Syst.

University of Bologna, Italy (PHD)

Education History

University of Bologna, Italy

PHD

Publications

Petar Jokic, Erfan Azarkhish, Andrea Bonetti, Marc Pons, Stéphane Emery, Luca Benini
A Construction Kit for Efficient Low Power Neural Network Accelerator Designs. ACM Trans. Embed. Comput. Syst. 21 (5) (2022)
Petar Jokic, Erfan Azarkhish, Régis Cattenoz, Engin Türetken, Luca Benini, Stéphane Emery
A Sub-mW Dual-Engine ML Inference System-on-Chip for Complete End-to-End Face-Analysis at the Edge. VLSI Circuits (2021)
Petar Jokic, Erfan Azarkhish, Andrea Bonetti, Marc Pons, Stéphane Emery, Luca Benini
A Construction Kit for Efficient Low Power Neural Network Accelerator Designs. CoRR (2021)
Komail M. H. Badami, Marc Pons Solé, Erfan Azarkhish, A. Fivaz, Michaël Rapin, Olivier Chételat, Stéphane Emery
Single-Battery Cooperative Sensors For Multi-Lead Long Term Ambulatory ECG Measurement. BioCAS (2021)
Marc Pons Solé, Andre Bischof, Lorenzo Bergamini, Philippe Dallemagne, Stéphane Emery, Komail M. H. Badami, Jiang Deng, Themistoklis Mavrogordatos, Erfan Azarkhish, Loïc Zahnd, Costantino Cosentino, Marcin K. Augustyniak, Yingyun Zha
A 20 Channel EMG SoC with an Integrated 32b RISC Core for Real-Time Wireless Prosthetic Control. ESSCIRC (2019)
Erfan Azarkhish, Davide Rossi, Igor Loi, Luca Benini
Neurostream: Scalable and Energy Efficient Deep Learning with Smart Memory Cubes. IEEE Trans. Parallel Distributed Syst. 29 (2) (2018)
Erfan Azarkhish, Davide Rossi, Igor Loi, Luca Benini
Neurostream: Scalable and Energy Efficient Deep Learning with Smart Memory Cubes. CoRR (2017)
Maryam Payami, Erfan Azarkhish, Igor Loi, Luca Benini
A Hybrid Instruction Prefetching Mechanism for Ultra Low-Power Multicore Clusters. IEEE Embed. Syst. Lett. 9 (4) (2017)
Erfan Azarkhish, Christoph Pfister, Davide Rossi, Igor Loi, Luca Benini
Logic-Base Interconnect Design for Near Memory Computing in the Smart Memory Cube. IEEE Trans. Very Large Scale Integr. Syst. 25 (1) (2017)
Erfan Azarkhish, Davide Rossi, Igor Loi, Luca Benini
Design and Evaluation of a Processing-in-Memory Architecture for the Smart Memory Cube. ARCS (2016)
Erfan Azarkhish, Davide Rossi, Igor Loi, Luca Benini
High performance AXI-4.0 based interconnect for extensible smart memory cubes. DATE (2015)
Erfan Azarkhish, Davide Rossi, Igor Loi, Luca Benini
A Modular Shared L2 Memory Design for 3-D Integration. IEEE Trans. Very Large Scale Integr. Syst. 23 (8) (2015)
Erfan Azarkhish, Igor Loi, Luca Benini
A high-performance multiported L2 memory IP for scalable three-dimensional integration. 3DIC (2013)
Erfan Azarkhish, Igor Loi, Luca Benini
A case for three-dimensional stacking of tightly coupled data memories over multi-core clusters using low-latency interconnects. IET Comput. Digit. Tech. 7 (5) (2013)
Erfan Azarkhish, Igor Loi, Luca Benini
3D logarithmic interconnect: Stacking multiple L1 memory dies over multi-core clusters. NOCS (2013)

Erfan Azarkhish.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Erfan Azarkhish