Marc Pons

Publication Activity (10 Years)

Years Active: 2007-2022
Publications (10 Years): 8

Top Topics

Medical Devices

Fourier Coefficients

Top Venues

ACM Trans. Embed. Comput. Syst.

Publications

Petar Jokic, Erfan Azarkhish, Andrea Bonetti, Marc Pons, Stéphane Emery, Luca Benini
A Construction Kit for Efficient Low Power Neural Network Accelerator Designs. ACM Trans. Embed. Comput. Syst. 21 (5) (2022)
Petar Jokic, Erfan Azarkhish, Andrea Bonetti, Marc Pons, Stéphane Emery, Luca Benini
A Construction Kit for Efficient Low Power Neural Network Accelerator Designs. CoRR (2021)
Jian Deng, Jean-Luc Nagel, Loïc Zahnd, Marc Pons, David Ruffieux, Claude Arm, Pascal Persechini, Stéphane Emery
Energy-Autonomous MCU Operating in sub-VT Regime with Tightly-Integrated Energy-Harvester : A SoC for IoT smart nodes containing a MCU with minimum-energy point of 2.9pJ/cycle and a harvester with output power range from sub-µW to 4.32mW. ISLPED (2019)
Marc Pons, Christoph Thomas Müller, David Ruffieux, Jean-Luc Nagel, Stéphane Emery, Andreas Burg, Shuuji Tanahashi, Yoshitaka Tanaka, Atsushi Takeuchi
A 0.5 V 2.5 μW/MHz Microcontroller with Analog-Assisted Adaptive Body Bias PVT Compensation with 3.13nW/kB SRAM Retention in 55nm Deeply-Depleted Channel CMOS. CICC (2019)
Christoph Thomas Müller, Marc Pons, David Ruffieux, Jean-Luc Nagel, Stéphane Emery, Andreas Burg, Shuuji Tanahashi, Yoshitaka Tanaka, Atsushi Takeuchi
Minimum Energy Point in Constant Frequency Designs under Adaptive Supply Voltage and Body Bias Adjustment in 55 nm DDC. PRIME (2019)
Pierre-François Ruedi, A. Bishof, Marcin K. Augustyniak, Pascal Persechini, Jean-Luc Nagel, Marc Pons, Stéphane Emery, Olivier Chételat
Ultra low power microelectronics for wearable and medical devices. DATE (2017)
Marc Pons, Thanh-Chau Le, Claude Arm, Daniel Séverac, Jean-Luc Nagel, Marc-Nicolas Morgan, Stéphane Emery
Sub-threshold latch-based icyflex2 32-bit processor with wide supply range operation. ESSCIRC (2016)
Christian Piguet, Marc Pons, Daniel Séverac
Sub-Threshold Design and Architectural Choices. ISVLSI (2015)
Marc Pons, Jean-Luc Nagel, Daniel Séverac, Marc-Nicolas Morgan, Daniel Sigg, Pierre-François Ruedi, Christian Piguet
Ultra low-power standard cell design using planar bulk CMOS in subthreshold operation. PATMOS (2013)
Marc Pons, Marc-Nicolas Morgan, Christian Piguet
Fixed origin corner square inspection layout regularity metric. DATE (2012)
Marc Pons, Jean-Luc Nagel, Christian Piguet
Maximum delay variation temperature-aware standard cell design. ICECS (2012)
Marc Pons, Francesc Moll, Antonio Rubio, Jaume Abella, Xavier Vera, Antonio González
Design of complex circuits using the Via-Configurable transistor array regular layout fabric. SoCC (2011)
Marc Pons, Francesc Moll, Antonio Rubio, Jaume Abella, Xavier Vera, Antonio González
VCTA: A Via-Configurable Transistor Array regular fabric. VLSI-SoC (2010)
Dennis Andrade, Ferran Martorell, Marc Pons, Francesc Moll, Antonio Rubio
Power supply noise and logic error probability. ECCTD (2007)