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Sub-threshold latch-based icyflex2 32-bit processor with wide supply range operation.
Marc Pons
Thanh-Chau Le
Claude Arm
Daniel Séverac
Jean-Luc Nagel
Marc-Nicolas Morgan
Stéphane Emery
Published in:
ESSCIRC (2016)
Keyphrases
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wide range
random access memory
power consumption
logical operations
high speed
real time
data sets
parallel processing
high density
flip flops
clock gating
computer architecture
multi core processors
adaptive threshold
processor core