Eduardo Costa

Publication Activity (10 Years)

Years Active: 2001-2023
Publications (10 Years): 14

Top Topics

Haar Wavelet Transform

Power Dissipation

Efficient Algorithms To Compute

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Arthur Cardozo, Morgana M. A. da Rosa, Rafael Soares, Eduardo Costa, Sergio Bampi
An Ultra Low-Energy VLSI Approximate Discrete Haar Wavelet Transform for ECG Data Compression. ICECS (2023)
Rodrigo Lopes, Leonardo Antonietti, Morgana M. A. da Rosa, Eduardo Costa, Rafael Soares, Sergio Bampi
New Energy-Efficient 3-2 and 4-2 Approximate Adder Compressors Topologies. ICECS (2023)
Gerson D. Andrade, Matheus Silva, Cínthia Schneider, Guilherme Paim, Sergio Bampi, Eduardo Costa, Alexandra L. Zimpeck
Robustness Analysis of 3-2 Adder Compressor Designed in 7-nm FinFET Technology. IEEE Trans. Circuits Syst. II Express Briefs 70 (3) (2023)
Morgana M. A. da Rosa, Eduardo Costa, Rafael Soares, Sergio Bampi
Accuracy-, Delay- and Area-Driven Evaluation of Lower-Part Approximate Parallel Prefix Adder. ICECS (2023)
Luis F. Sequeira, Gustavo M. Santana, Guilherme Paim, Leandro M. G. Rocha, Brunno Abreu, Eduardo Costa, Sergio Bampi
Low-Power HEVC 8-point 2-D Discrete Cosine Transform Hardware Using Adder Compressors. NEWCAS (2018)
Leandro M. G. Rocha, Guilherme Paim, Rafael S. Ferreira, Eduardo Costa, Sergio Bampi
Framework-based arithmetic core generation to explore ASIC-based parallel binary multipliers. ICECS (2017)
Bianca Silveira, Brunno Abreu, Guilherme Paim, Mateus Grellert, Rafael S. Ferreira, Cláudio Machado Diniz, Eduardo Costa, Sergio Bampi
Using adder and subtractor compressors to sum of absolute transformed differences architecture for low-power video encoding. ICECS (2017)
Andre N. Sapper, Leonardo Bandeira Soares, Eduardo Costa, Sergio Bampi
Exploring the combination of number of bits and number of iterations for a power-efficient fixed-point CORDIC implementation. ICECS (2017)
Brunno Abreu, Guilherme Paim, Mateus Grellert, Bianca Silveira, Cláudio Machado Diniz, Eduardo Costa, Sergio Bampi
Exploiting absolute arithmetic for power-efficient sum of absolute differences. ICECS (2017)
Guilherme Paim, Leonardo Bandeira Soares, Rafael S. Ferreira, Eduardo Costa, Sergio Bampi
Pruning and approximation of coefficients for power-efficient 2-D Discrete Tchebichef Transform. NEWCAS (2017)
Julio de Oliveira, Leonardo Bandeira Soares, Eduardo Costa, Sergio Bampi
Exploiting approximate adder circuits for power-efficient Gaussian and Gradient filters for Canny edge detector algorithm. LASCAS (2016)
Guilherme Paim, Leonardo Bandeira Soares, Julio F. R. Oliveira, Eduardo Costa, Sergio Bampi
A power-efficient imprecise radix-4 multiplier applied to high resolution audio processing. ICECS (2016)
Leonardo Bandeira Soares, Sergio Bampi, Eduardo Costa
Approximate adder synthesis for area- and energy-efficient FIR filters in CMOS VLSI. NEWCAS (2015)
Sidinei Ghissoni, Eduardo Costa, Ricardo Reis
Reusing smaller optimized FFT blocks for the realization of larger power-efficient radix-2 FFTs. PATMOS (2015)
Gustavo Seibel, Fabio Itturriet, Eduardo Costa, Sérgio Almeida
Fixed-point adaptive filter architecture for the harmonics power line interference cancelling. LASCAS (2013)
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
Exploration of tradeoffs in the design of integer cosine transforms for image compression. ECCTD (2013)
Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro
Design of Digit-Serial FIR Filters: Algorithms, Architectures, and a CAD Tool. IEEE Trans. Very Large Scale Integr. Syst. 21 (3) (2013)
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
Optimization Algorithms for the Multiplierless Realization of Linear Transforms. ACM Trans. Design Autom. Electr. Syst. 17 (1) (2012)
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
Multiple tunable constant multiplications: Algorithms and applications. ICCAD (2012)
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
Design of low-complexity digital finite impulse response filters on FPGAs. DATE (2012)
Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro
High-level algorithms for the optimization of gate-level area in digit-serial multiple constant multiplications. Integr. 45 (3) (2012)
Sidinei Ghissoni, Eduardo Costa, José Monteiro, Ricardo Reis
Efficient area and power multiplication part of FFT based on twiddle factor decomposition. ICECS (2012)
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
Finding the optimal tradeoff between area and delay in multiple constant multiplications. Microprocess. Microsystems 35 (8) (2011)
Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro
Optimization of area in digit-serial Multiple Constant Multiplications at gate-level. ISCAS (2011)
Sidinei Ghissoni, Eduardo Costa, José Monteiro, Ricardo Reis
Combination of constant matrix multiplication and gate-level approaches for area and power efficient hybrid radix-2 DIT FFT realization. ICECS (2011)
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
Design of low-power multiple constant multiplications using low-complexity minimum depth operations. ACM Great Lakes Symposium on VLSI (2011)
Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro
Efficient shift-adds design of digit-serial multiple constant multiplications. ACM Great Lakes Symposium on VLSI (2011)
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
A hybrid algorithm for the optimization of area and delay in linear DSP transforms. VLSI-SoC (2011)
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
Optimization of gate-level area in high throughput Multiple Constant Multiplications. ECCTD (2011)
Sidinei Ghissoni, Eduardo Costa, Cristiano Lazzari, José Monteiro, Levent Aksoy, Ricardo Reis
Radix-2 Decimation in Time (DIT) FFT implementation based on a Matrix-Multiple Constant multiplication approach. ICECS (2010)
Diego Jaccottet, Eduardo Costa, Levent Aksoy, Paulo F. Flores, José Monteiro
Design of low-complexity and high-speed digital Finite Impulse Response filters. VLSI-SoC (2010)
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
Optimization of Area and Delay at Gate-Level in Multiple Constant Multiplications. DSD (2010)
Levent Aksoy, Diego Jaccottet, Eduardo Costa
Design of low complexity digital FIR filters. SBCCI (2009)
Marcelo Schiavon Porto, Sergio Bampi, João S. Altermann, Eduardo Costa
Power efficient architecture for motion estimation using the QSDS-DIC algorithm. ICECS (2009)
Vagner S. Rosa, Fabio F. Daitx, Eduardo Costa, Sergio Bampi
Design flow for the generation of optimized FIR filters. ICECS (2009)
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
ASSUMEs: Heuristic Algorithms for Optimization of Area and Delay in Digital Filter Synthesis. ICECS (2006)
Eduardo Costa, Sergio Bampi, José Monteiro
A New Architecture for 2's Complement Gray Encoded Array Multiplier. SBCCI (2002)
Eduardo Costa, Sergio Bampi, José Monteiro
Power Efficient Arithmetic Operand Encoding. SBCCI (2001)