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Framework-based arithmetic core generation to explore ASIC-based parallel binary multipliers.

Leandro M. G. RochaGuilherme PaimRafael S. FerreiraEduardo CostaSergio Bampi
Published in: ICECS (2017)
Keyphrases
  • main contribution
  • lightweight
  • conceptual framework
  • data sets
  • databases
  • neural network
  • theoretical framework
  • design methodology
  • parallel computing
  • error correcting output codes