Dong-U Lee

Publication Activity (10 Years)

Years Active: 2002-2015
Publications (10 Years): 0

Top Venues

IEEE Trans. Image Process.

ACM Trans. Design Autom. Electr. Syst.

Imperial College London, UK (PHD)

Education History

Imperial College London, UK

PHD

Publications

Lok-Won Kim, Dong-U Lee, John D. Villasenor
Automated Iterative Pipelining for ASIC Design. ACM Trans. Design Autom. Electr. Syst. 20 (2) (2015)
Dong-U Lee, Lok-Won Kim, John D. Villasenor
Precision-Aware Self-Quantizing Hardware Architectures for the Discrete Wavelet Transform. IEEE Trans. Image Process. 21 (2) (2012)
Dong-U Lee, Ray C. C. Cheung, Wayne Luk, John D. Villasenor
Hierarchical Segmentation for Hardware Function Evaluation. IEEE Trans. Very Large Scale Integr. Syst. 17 (1) (2009)
Dong-U Lee, Hyungjin Kim, Mohammad H. Rahimi, Deborah Estrin, John D. Villasenor
Energy-Efficient Image Compression for Resource-Constrained Platforms. IEEE Trans. Image Process. 18 (9) (2009)
Dong-U Lee, John D. Villasenor
Optimized Custom Precision Function Evaluation for Embedded Processors. IEEE Trans. Computers 58 (1) (2009)
Dong-U Lee, Ray C. C. Cheung, Wayne Luk, John D. Villasenor
Hardware Implementation Trade-Offs of Polynomial Approximations and Interpolations. IEEE Trans. Computers 57 (5) (2008)
Hyungjin Kim, Dong-U Lee, John D. Villasenor
Design Tradeoffs and Hardware Architecture for Real-Time Iterative MIMO Detection using Sphere Decoding and LDPC Coding. IEEE J. Sel. Areas Commun. 26 (6) (2008)
Hyungjin Kim, Mohammad H. Rahimi, Dong-U Lee, Deborah Estrin, John D. Villasenor
Energy-Aware High Resolution Image Acquisition via Heterogeneous Image Sensors. IEEE J. Sel. Top. Signal Process. 2 (4) (2008)
Dong-U Lee, Hyungjin Kim, Christopher R. Jones, John D. Villasenor
Pilotless Frame Synchronization for LDPC-Coded Transmission Systems. IEEE Trans. Signal Process. 56 (7-1) (2008)
Ray C. C. Cheung, Dong-U Lee, Wayne Luk, John D. Villasenor
Hardware Generation of Arbitrary Random Number Distributions From Uniform Distributions Via the Inversion Method. IEEE Trans. Very Large Scale Integr. Syst. 15 (8) (2007)
Dong-U Lee, Hyungjin Kim, Steven Tu, Mohammad H. Rahimi, Deborah Estrin, John D. Villasenor
Energy-optimized image communication on resource-constrained sensor platforms. IPSN (2007)
Dong-U Lee, Hyungjin Kim, Christopher R. Jones, John D. Villasenor
Pilotless Frame Synchronization via LDPC Code Constraint Feedback. IEEE Commun. Lett. 11 (8) (2007)
Dong-U Lee, Ray C. C. Cheung, John D. Villasenor
A Flexible Architecture for Precise Gamma Correction. IEEE Trans. Very Large Scale Integr. Syst. 15 (4) (2007)
Dong-U Lee, John D. Villasenor
A Bit-Width Optimization Methodology for Polynomial-Based Function Evaluation. IEEE Trans. Computers 56 (4) (2007)
Dong-U Lee, Altaf Abdul Gaffar, Ray C. C. Cheung, Oskar Mencer, Wayne Luk, George A. Constantinides
Accuracy-Guaranteed Bit-Width Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (10) (2006)
Dong-U Lee, Ray C. C. Cheung, John D. Villasenor, Wayne Luk
Inversion-based hardware gaussian random number generator: A case study of function evaluation via hierarchical segmentation. FPT (2006)
Dong-U Lee, John D. Villasenor, Wayne Luk, Philip Heng Wai Leong
A Hardware Gaussian Noise Generator Using the Box-Muller Method and Its Error Analysis. IEEE Trans. Computers 55 (6) (2006)
Dong-U Lee, Esteban L. Vallés, John D. Villasenor, Christopher R. Jones
Joint LDPC decoding and timing recovery using code constraint feedback. IEEE Commun. Lett. 10 (3) (2006)
Guanglie Zhang, Philip Heng Wai Leong, Chun Hok Ho, Kuen Hung Tsoi, Chris C. C. Cheung, Dong-U Lee, Ray C. C. Cheung, Wayne Luk
Reconfigurable Acceleration for Monte Carlo Based Financial Simulation. FPT (2005)
Guanglie Zhang, Philip Heng Wai Leong, Dong-U Lee, John D. Villasenor, Ray C. C. Cheung, Wayne Luk
Ziggurat-based Hardware Gaussian Random Number Generator. FPL (2005)
Ray C. C. Cheung, Dong-U Lee, Oskar Mencer, Wayne Luk, Peter Y. K. Cheung
Automating custom-precision function evaluation for embedded processors. CASES (2005)
Dong-U Lee, Wayne Luk, John D. Villasenor, Guanglie Zhang, Philip Heng Wai Leong
A hardware Gaussian noise generator using the Wallace method. IEEE Trans. Very Large Scale Integr. Syst. 13 (8) (2005)
Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk
MiniBit: bit-width optimization via affine arithmetic. DAC (2005)
Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk
Optimizing Hardware Function Evaluation. IEEE Trans. Computers 54 (12) (2005)
Dong-U Lee, Oskar Mencer, David J. Pearce, Wayne Luk
Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs. FPL (2004)
Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y. K. Cheung
A Gaussian Noise Generator for Hardware-Based Simulations. IEEE Trans. Computers 53 (12) (2004)
Dong-U Lee, Wayne Luk, Connie Wang, Christopher R. Jones, Michael Smith, John D. Villasenor
A Flexible Hardware Encoder for Low-Density Parity-Check Codes. FCCM (2004)
Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk
Adaptive range reduction for hardware function evaluation. FPT (2004)
Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y. K. Cheung
Non-uniform Segmentation for Hardware Function Evaluation. FPL (2003)
Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y. K. Cheung
A Hardware Gaussian Noise Generator for Channel Code Evaluation. FCCM (2003)
Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y. K. Cheung
Hierarchical segmentation schemes for function evaluation. FPT (2003)
Dong-U Lee, T. K. Lee, Wayne Luk, Peter Y. K. Cheung
Incremental programming for reconfigurable engines. FPT (2002)

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Publication Activity (10 Years)

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Dong-U Lee