D. K. Mishra

Publication Activity (10 Years)

Years Active: 2008-2020
Publications (10 Years): 4

Top Topics

Cmos Technology

Write Operations

Power Management

Top Venues

Microelectron. J.

J. Circuits Syst. Comput.

Publications

Bhawana Garg, D. K. Mishra
Precision measurement of ADC parameters with cumulative histogram technique using Gaussian noise. Microelectron. J. 104 (2020)
S. R. Mansore, R. S. Gamad, D. K. Mishra
A 32 nm Read Disturb-free 11T SRAM Cell with Improved Write Ability. J. Circuits Syst. Comput. 29 (5) (2020)
Shivram Mansore, Radheshyam Gamad, D. K. Mishra
A Single-Ended Read Decoupled 9T SRAM Cell for Low Power Applications. iNIS (2017)
Dinesh Kushwaha, D. K. Mishra
A 415 nW, 0.8 V, voltage reference circuit using MOSFETs in saturation and sub-threshold regions. ICIIS (2016)
Anshu Gupta, D. K. Mishra, Rajesh Khatri, U. B. S. Chandrawat, Preet Jain
A two stage and three stage CMOS OPAMP with fast settling, high DC gain and low power designed in 180nm technology. CISIM (2010)
Savita Charhate, D. K. Mishra
BIST Based Performance Evaluation of Field Programmable Analog Arrays. ICETET (2008)