A Single-Ended Read Decoupled 9T SRAM Cell for Low Power Applications.

Shivram Mansore Radheshyam Gamad D. K. Mishra

Published in: iNIS (2017)

Keyphrases

low power
power consumption
high speed
low cost
high power
single chip
vlsi architecture
wireless transmission
digital signal processing
low power consumption
cmos technology
logic circuits
power management
gate array
power reduction
real time
power dissipation
image sensor
vlsi circuits
image processing