Bill Pontikakis

Publication Activity (10 Years)

Years Active: 2002-2024
Publications (10 Years): 3

Top Topics

Hardware And Software

Hardware Architectures

General Purpose

Network Devices

Top Venues

IEEE Trans. Netw. Serv. Manag.

Publications

Mostafa Elbediwy, Bill Pontikakis, Alireza Ghaffari, Jean-Pierre David, Yvon Savaria
DR-PIFO: A Dynamic Ranking Packet Scheduler Using a Push-In-First-Out Queue. IEEE Trans. Netw. Serv. Manag. 21 (1) (2024)
Mostafa Elbediwy, Bill Pontikakis, Jean-Pierre David, Yvon Savaria
A Hardware Architecture of a Dynamic Ranking Packet Scheduler for Programmable Network Devices. IEEE Access 11 (2023)
Mengyue Su, Jean-Pierre David, Yvon Savaria, Bill Pontikakis, Thomas Luinaud
An FPGA-based HW/SW Co-Verification Environment for Programmable Network Devices. ISCAS (2022)
Syed Rafay Hasan, Bill Pontikakis, Yvon Savaria
An All-digital Skew-adaptive Clock Scheduling Algorithm for Heterogeneous Multiprocessor Systems on Chips (MPSoCs). ISCAS (2009)
Bill Pontikakis, Hung Tien Bui, François R. Boyer, Yvon Savaria
A Low-Complexity High-Speed Clock Generator for Dynamic Frequency Scaling of FPGA and Standard-Cell Based Designs. ISCAS (2007)
Bill Pontikakis, François R. Boyer, Yvon Savaria
A 0.8V algorithmically defined buffer and ring oscillator low-energy design for nanometer SoCs. ISCAS (2006)
Bill Pontikakis, François R. Boyer, Yvon Savaria
Performance Improvement of Configurable Processor Architectures Using a Variable Clock Period. IWSOC (2005)
Bill Pontikakis, Mohamed Nekili
A novel double edge-triggered pulse-clocked TSPC D flip-flop for high-performance and low-power VLSI design applications. ISCAS (5) (2002)