Thomas Luinaud

Publication Activity (10 Years)

Years Active: 2017-2023
Publications (10 Years): 11

Top Topics

Environmentally Friendly

Fpga Implementation

Field Programmable Gate Array

Heterogeneous Data

Top Venues

Publications

Thomas Luinaud, J. M. Pierre Langlois, Yvon Savaria
Symbolic Analysis for Data Plane Programs Specialization. ACM Trans. Archit. Code Optim. 20 (1) (2023)
Mengyue Su, Jean-Pierre David, Yvon Savaria, Bill Pontikakis, Thomas Luinaud
An FPGA-based HW/SW Co-Verification Environment for Programmable Network Devices. ISCAS (2022)
Thomas Luinaud, Jeferson Santiago da Silva, J. M. Pierre Langlois, Yvon Savaria
Design Principles for Packet Deparsers on FPGAs. CoRR (2021)
Thomas Luinaud, Jeferson Santiago da Silva, J. M. Pierre Langlois, Yvon Savaria
Design Principles for Packet Deparsers on FPGAs. FPGA (2021)
Thomas Luinaud, Thibaut Stimpfling, Jeferson Santiago da Silva, Yvon Savaria, J. M. Pierre Langlois
Bridging the Gap: FPGAs as Programmable Switches. CoRR (2020)
Thomas Luinaud, Thibaut Stimpfling, Jeferson Santiago da Silva, Yvon Savaria, J. M. Pierre Langlois
Bridging the Gap: FPGAs as Programmable Switches. HPSR (2020)
Thomas Luinaud, Thibaut Stimpfling, Jeferson Santiago da Silva, Yvon Savaria, J. M. Pierre Langlois
Unleashing the Power of FPGAs as Programmable Switches. FPGA (2020)
Jeferson Santiago da Silva, Thibaut Stimpfling, Thomas Luinaud, Bachir Fradj, Bochra Boughzala
One for All, All for One: A Heterogeneous Data Plane for Flexible P4 Processing. ICNP (2018)
Jeferson Santiago da Silva, Thibaut Stimpfling, Thomas Luinaud, Bachir Fradj, Bochra Boughzala
One for All, All for One: A Heterogeneous Data Plane for Flexible P4 Processing. CoRR (2018)
Thomas Luinaud, Yvon Savaria, J. M. Pierre Langlois
An FPGA Coarse Grained Intermediate Fabric for Regular Expression Search. ACM Great Lakes Symposium on VLSI (2017)
Thomas Luinaud, Yvon Savaria, J. M. Pierre Langlois
An FPGA Overlay Architecture for Cost Effective Regular Expression Search (Abstract Only). FPGA (2017)