Behzad Mesgarzadeh

Publication Activity (10 Years)

Years Active: 2004-2015
Publications (10 Years): 0

Top Topics

Noise Reduction

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Amin Ojani, Behzad Mesgarzadeh, Atila Alvandpour
Monte Carlo-Free Prediction of Spurious Performance for ECDLL-Based Synthesizers. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2015)
Amin Ojani, Behzad Mesgarzadeh, Atila Alvandpour
A low-power direct IQ upconversion technique based on duty-cycled multi-phase sub-harmonic passive mixers for UWB transmitters. ISIC (2014)
Amin Ojani, Behzad Mesgarzadeh, Atila Alvandpour
A self-calibration technique for fast-switching frequency-hopped UWB synthesis. MIXDES (2014)
Amin Ojani, Behzad Mesgarzadeh, Atila Alvandpour
Modeling and Analysis of Harmonic Spurs in DLL-Based Frequency Synthesizers. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2014)
Behzad Mesgarzadeh
Simultaneous switching noise reduction by resonant clock distribution networks. Integr. 47 (2) (2014)
Ameya Bhide, Omid Esmailzadeh Najari, Behzad Mesgarzadeh, Atila Alvandpour
An 8-GS/s 200-MHz Bandwidth 68-mW ΔΣ DAC in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs (7) (2013)
Amin Ojani, Behzad Mesgarzadeh, Atila Alvandpour
A quadrature UWB frequency synthesizer with dynamic settling-time calibration. ISCAS (2013)
Behzad Mesgarzadeh, Ingemar Söderquist, Atila Alvandpour
Reliability challenges in avionics due to silicon aging. DDECS (2012)
Amin Ojani, Behzad Mesgarzadeh, Atila Alvandpour
A process variation tolerant DLL-based UWB frequency synthesizer. MWSCAS (2012)
Amin Ojani, Behzad Mesgarzadeh, Atila Alvandpour
A DLL-based injection-locked frequency synthesizer for WiMedia UWB. ISCAS (2012)
Jonas Fritzin, Behzad Mesgarzadeh, Atila Alvandpour
A Class-D stage with harmonic suppression and DLL-based phase generation. MWSCAS (2012)
Behzad Mesgarzadeh, Iman Esmaeil Zadeh, Atila Alvandpour
A multi-segment clocking scheme to reduce on-chip EMI. SoCC (2011)
Behzad Mesgarzadeh, Atila Alvandpour
EMI reduction by resonant clock distribution networks. ISCAS (2010)
Behzad Mesgarzadeh, Atila Alvandpour
A Low-Power Digital DLL-Based Clock Generator in Open-Loop Mode. IEEE J. Solid State Circuits 44 (7) (2009)
Behzad Mesgarzadeh, Atila Alvandpour
A 2-GHz 7-mW digital DLL-based frequency multiplier in 90-nm CMOS. ESSCIRC (2008)
Behzad Mesgarzadeh, Martin Hansson, Atila Alvandpour
Jitter Characteristic in Charge Recovery Resonant Clock Distribution. IEEE J. Solid State Circuits 42 (7) (2007)
Behzad Mesgarzadeh, Atila Alvandpour
First-Harmonic Injection-Locked Ring Oscillators. CICC (2006)
Behzad Mesgarzadeh, Atila Alvandpour
A 24-mW 0.02-mm2 1.5-GHz DLL-Based Frequency Multiplier in 130-nm CMOS. SoCC (2006)
Martin Hansson, Behzad Mesgarzadeh, Atila Alvandpour
1.56 GHz On-chip Resonant Clocking in 130nm CMOS. CICC (2006)
Behzad Mesgarzadeh, Atila Alvandpour
A wide-tuning range 1.8 GHz quadrature VCO utilizing coupled ring oscillators. ISCAS (2006)
Behzad Mesgarzadeh, Atila Alvandpour
A study of injection locking in ring oscillators. ISCAS (6) (2005)
Anders Edman, Christer Svensson, Behzad Mesgarzadeh
Synchronous latency-insensitive design for multiple clock domain. SoCC (2005)
Behzad Mesgarzadeh
A CMOS implementation of current-mode min-max circuits and a sample fuzzy application. FUZZ-IEEE (2004)
Behzad Mesgarzadeh, Christer Svensson, Atila Alvandpour
A new mesochronous clocking scheme for synchronization in SoC. ISCAS (2) (2004)