A multi-segment clocking scheme to reduce on-chip EMI.

Behzad Mesgarzadeh Iman Esmaeil Zadeh Atila Alvandpour

Published in: SoCC (2011)

Keyphrases

circuit design
high speed
vlsi implementation
low cost
detection scheme
learning bayesian networks
vlsi design
real time
multiscale
evolutionary algorithm
segmentation scheme
significantly reduced
high image quality