A Low-Power Digital DLL-Based Clock Generator in Open-Loop Mode.
Behzad MesgarzadehAtila AlvandpourPublished in: IEEE J. Solid State Circuits (2009)
Keyphrases
- low power
- open loop
- power consumption
- high speed
- closed loop
- mixed signal
- low cost
- feedback control
- control system
- vlsi circuits
- single chip
- low power consumption
- inverted pendulum
- control law
- logic circuits
- digital signal processing
- control scheme
- multi channel
- cmos image sensor
- power reduction
- stability analysis
- vlsi architecture
- real time
- gate array
- lagrange multipliers
- image sensor
- fuzzy logic
- objective function