Ashwani K. Rana

Publication Activity (10 Years)

Years Active: 2011-2023
Publications (10 Years): 6

Top Topics

Evaluation Measures

Analytical Models

Information Retrieval

Top Venues

Microelectron. J.

Circuits Syst. Signal Process.

Publications

Shelja Kaushal, Ashwani K. Rana
Reliable and low power Negative Capacitance Junctionless FinFET based 6T SRAM cell. Integr. 88 (2023)
Shelja Kaushal, Ashwani K. Rana
Analytical model of subthreshold drain current for nanoscale negative capacitance junctionless FinFET. Microelectron. J. 121 (2022)
Rajneesh Sharma, Rituraj S. Rathore, Ashwani K. Rana
Impact of High-k Spacer on Device Performance of Nanoscale Underlap Fully Depleted SOI MOSFET. J. Circuits Syst. Comput. 27 (4) (2018)
Shalu Kaundal, Ashwani K. Rana
Evaluation of statistical variability and parametric sensitivity of non-uniformly doped Junctionless FinFET. Microelectron. Reliab. 91 (2018)
Rituraj Singh Rathore, Rajneesh Sharma, Ashwani K. Rana
Impact of Work Function Fluctuations on Threshold Voltage Variability in a Nanoscale FinFETs. iNIS (2016)
Rajneesh Sharma, Ashwani K. Rana
Strained Si: Opportunities and challenges in nanoscale MOSFET. ReTIS (2015)
Amita Nandal, T. Vigneswaran, Ashwani K. Rana
DA-Based Efficient Testable FIR Filter Implementation on FPGA Using Reversible Logic. Circuits Syst. Signal Process. 33 (3) (2014)
Deepesh Ranka, Ashwani K. Rana, Rakesh Kumar Yadav, Kamalesh Yadav, Devendra Giri
Performance evaluation of FD-SOI Mosfets for different metal gate work function CoRR (2011)
Ashwani K. Rana, Narottam Chand, Vinod Kapoor
Modeling gate Current for nano Scale MOSFET with Different gate spacer. J. Circuits Syst. Comput. 20 (8) (2011)