Arshad Aziz

Publication Activity (10 Years)

Years Active: 2007-2024
Publications (10 Years): 12

Top Topics

Image Processing

Fpga Technology

Hardware Architectures

Texture Retrieval

Top Venues

Comput. Electr. Eng.

Secur. Commun. Networks

Microprocess. Microsystems

Publications

Mehwish Raza, Sharjeel Javed, Majida Kazmi, Arshad Aziz, Muhammad Fahim Ul Haque, Saad Ahmed Qazi
Approximate Computing: Hardware and Software Techniques, Tools and Their Applications. J. Circuits Syst. Comput. 33 (4) (2024)
Muhammad Danyal Khan, Raheem Ali, Arshad Aziz
Code-Switched Urdu ASR for Noisy Telephonic Environment using Data Centric Approach with Hybrid HMM and CNN-TDNN. CoRR (2023)
Majida Kazmi, Maria Tabasum Shoaib, Arshad Aziz, Hashim Raza Khan, Saad Ahmed Qazi
An Efficient IIoT-Based Smart Sensor Node for Predictive Maintenance of Induction Motors. Comput. Syst. Sci. Eng. 47 (1) (2023)
Dur-e-Shahwar Kundi, Ayesha Khalid, Arshad Aziz, Chenghua Wang, Máire O'Neill, Weiqiang Liu
Resource-Shared Crypto-Coprocessor of AES Enc/Dec With SHA-3. IEEE Trans. Circuits Syst. (12) (2020)
Majida Kazmi, Arshad Aziz, Hashim Raza Khan, Saad Ahmed Qazi, Lampros K. Stergioulas
Resource-Efficient Image Buffer Architecture for Neighborhood Processors. IEEE Access 8 (2020)
Majida Kazmi, Arshad Aziz, Dur-e-Shahwar Kundi
A Pareto-Optimal Multi-filter Architecture on FPGA for Image Processing Applications. Circuits Syst. Signal Process. 38 (10) (2019)
Majida Kazmi, Arshad Aziz, Pervez Akhtar
An efficient and compact row buffer architecture on FPGA for real-time neighbourhood image processing. J. Real Time Image Process. 16 (5) (2019)
Razia Zia, Pervez Akhtar, Arshad Aziz
A new rectangular window based image cropping method for generalization of brain neoplasm classification systems. Int. J. Imaging Syst. Technol. 28 (3) (2018)
Razia Zia, Pervez Akhtar, Arshad Aziz, Dur-e-Shahwar Kundi
Multi-resolution transforms-based hybrid feature extraction technique for differentiating glioma grades. Int. J. Wavelets Multiresolution Inf. Process. 16 (6) (2018)
Razia Zia, Pervez Akhtar, Arshad Aziz, Maroof Ali Shah, Dur-e-Shahwar Kundi
Non Sub-sampled Contourlet Transform Based Feature Extraction Technique for Differentiating Glioma Grades Using MRI Images. Australasian Conference on Artificial Intelligence (2017)
Dur-e-Shahwar Kundi, Arshad Aziz, Nassar Ikram
A high performance ST-Box based unified AES encryption/decryption architecture on FPGA. Microprocess. Microsystems 41 (2016)
Dur-e-Shahwar Kundi, Arshad Aziz
A low-power SHA-3 designs using embedded digital signal processing slice on FPGA. Comput. Electr. Eng. 55 (2016)
Dur-e-Shahwar Kundi, Arshad Aziz, Majida Kazmi
-box implementation for 128-bit AES on FPGA. Secur. Commun. Networks 8 (9) (2015)
Aisha Malik, Arshad Aziz, Dur-e-Shahwar Kundi, Moiz Akhter
Software implementation of Standard Hash Algorithm (SHA-3) Keccak on Intel core-i5 and Cavium Networks Octeon Plus embedded platform. MECO (2013)
Munaza Yousuf, Riaz Mahmud, Arshad Aziz
Simulation design of an efficient MTI processing module for embedded platform. MECO (2013)
Muhammad Arsalan, Arshad Aziz
Comparative Analysis of High Speed and Low Area Architectures of Blake SHA-3 Candidate on FPGA. FIT (2012)
Kashif Latif, Arshad Aziz, Athar Mahboob
Look-Up Table Based Implementations of SHA-3 Finalists: JH, Keccak and Skein. KSII Trans. Internet Inf. Syst. 6 (9) (2012)
Majida Kazmi, Arshad Aziz, Pervez Akhtar, Aliza Maftun, Wasay Bin Afaq
Medical image denoising based on adaptive thresholding in contourlet domain. BMEI (2012)
Kashif Latif, M. Muzaffar Rao, Athar Mahboob, Arshad Aziz
Novel Arithmetic Architecture for High Performance Implementation of SHA-3 Finalist Keccak on FPGA Platforms. ARC (2012)
Kashif Latif, Muhammad Tariq, Arshad Aziz, Athar Mahboob
Efficient Hardware Implementation of Secure Hash Algorithm (SHA-3) Finalist - Skein. ICFCE (2011)
Kashif Latif, Arshad Aziz, Athar Mahboob
Optimal utilization of available reconfigurable hardware resources. Comput. Electr. Eng. 37 (6) (2011)
Kashif Latif, Athar Mahboob, Arshad Aziz
High Throughput Hardware Implementation of Secure Hash Algorithm (SHA-3) Finalist: BLAKE. FIT (2011)
Dur-e-Shahwar Kundi, Arshad Aziz, Nassar Ikram
Resource efficient implementation of T-Boxes in AES on Virtex-5 FPGA. Inf. Process. Lett. 110 (10) (2010)
Kashif Latif, Arshad Aziz, Athar Mahboob
Efficient resource utilization of FPGAs. FIT (2009)
Abdul Samiah, Arshad Aziz, Nassar Ikram
An Efficient Software Implementation of AES-CCM for IEEE 802.11i Wireless St. COMPSAC (2) (2007)
Arshad Aziz, Nassar Ikram
An FPGA-based AES-CCM Crypto Core For IEEE 802.11i Architecture. Int. J. Netw. Secur. 5 (2) (2007)
Arshad Aziz, Nassar Ikram
A Look-Up-Table Implementation of AES. HPCNCS (2007)
Arshad Aziz, Nassar Ikram
Memory Efficient Implementation of AES S-Boxes on FPGA. J. Circuits Syst. Comput. 16 (4) (2007)