Memory Efficient Implementation of AES S-Boxes on FPGA.

Arshad Aziz Nassar Ikram

Published in: J. Circuits Syst. Comput. (2007)

Keyphrases

memory efficient
s box
advanced encryption standard
block cipher
chaotic map
hardware implementation
efficient implementation
external memory
encryption algorithm
dedicated hardware
hardware architectures
chaotic sequence
fpga technology
low cost
signal processing