An efficient and compact row buffer architecture on FPGA for real-time neighbourhood image processing.
Majida KazmiArshad AzizPervez AkhtarPublished in: J. Real Time Image Process. (2019)
Keyphrases
- real time
- image processing
- pipelined architecture
- dedicated hardware
- fpga implementation
- hardware implementation
- fpga device
- fpga technology
- fpga hardware
- high speed
- signal processing
- low cost
- xilinx virtex
- reconfigurable hardware
- real time image processing
- image processing algorithms
- software implementation
- field programmable gate array
- pattern recognition
- hardware design
- hardware architecture
- machine vision
- image enhancement
- vision system
- low power consumption
- video processing
- vlsi architecture
- medical imaging
- denoising
- computer vision
- parallel architecture
- image segmentation
- general purpose processors
- feature extraction
- systolic array
- hardware architectures
- image analysis
- management system
- computer graphics
- data acquisition
- hardware software
- software architecture
- efficient implementation
- event driven