Arijit Dutta

Publication Activity (10 Years)

Years Active: 2001-2024
Publications (10 Years): 11

Top Topics

Coloured Petri Nets

Privacy Enhancing

Top Venues

IACR Cryptol. ePrint Arch.

J. Netw. Syst. Manag.

Publications

Arijit Dutta, Luis Miguel Samaniego Campoverde, Mauro Tropea, Floriano De Rango
A Comprehensive Review of Recent Developments in VANET for Traffic, Safety & Remote Monitoring Applications. J. Netw. Syst. Manag. 32 (4) (2024)
Inam Ullah Khan, Muhammad Yaseen Ayub, Asrin Abdollahi, Arijit Dutta
A Hybrid Deep Learning Model-Based Intrusion Detection System for Emergency Planning Using IoT-Network. ICT-DM (2023)
Arijit Dutta, Suyash Bagad, Saravanan Vijayakumaran
MProve+ : Privacy Enhancing Proof of Reserves Protocol for Monero. IACR Cryptol. ePrint Arch. 2021 (2021)
Arijit Dutta, Suyash Bagad, Saravanan Vijayakumaran
MProve+: Privacy Enhancing Proof of Reserves Protocol for Monero. IEEE Trans. Inf. Forensics Secur. 16 (2021)
Luina Pani, Arijit Dutta, Chinmaya Misra, Ruben Roy
Assisting fog-cloud computing with an adaptive traffic awareness resource provisioning algorithm for health data. OCIT (2021)
Arijit Dutta, Luina Pani, Chinmaya Misra, Ruben Roy
Finite Buffer Queueing System Performance Study with Multi Heterogeneous Fog Architecture. OCIT (2021)
Arijit Dutta, Arnab Jana, Saravanan Vijayakumaran
Nummatus: A Privacy Preserving Proof of Reserves Protocol for Quisquis. INDOCRYPT (2019)
Arijit Dutta, Saravanan Vijayakumaran
Revelio: A MimbleWimble Proof of Reserves Protocol. CVCBT (2019)
Arijit Dutta, Saravanan Vijayakumaran
Revelio: A MimbleWimble Proof of Reserves Protocol. IACR Cryptol. ePrint Arch. 2019 (2019)
Arijit Dutta, Saravanan Vijayakumaran
MProve: A Proof of Reserves Protocol for Monero Exchanges. EuroS&P Workshops (2019)
Arijit Dutta, Saravanan Vijayakumaran
MProve: A Proof of Assets Protocol for Monero Exchanges. IACR Cryptol. ePrint Arch. 2018 (2018)
Bodhisatya Sarker, Jaswinder Ahuja, Arijit Dutta, Srinath D., Kaip Sridhar, Radhakrishnan Nair, Jayant Lahiri
Penalty for power reduction -: performance or schedule or yield? ISLPED (2008)
Nihar R. Mohapatra, Arijit Dutta, G. Sridhar, Madhav P. Desai, V. Ramgopal Rao
Sub-100 nm CMOS circuit performance with high-K gate dielectrics. Microelectron. Reliab. 41 (7) (2001)
Nihar R. Mohapatra, Arijit Dutta, Madhav P. Desai, V. Ramgopal Rao
Effect Of Fringing Capacitances In Sub 100 Nm Mosfet's With High-K Gate Dielectrics. VLSI Design (2001)