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Sub-100 nm CMOS circuit performance with high-K gate dielectrics.
Nihar R. Mohapatra
Arijit Dutta
G. Sridhar
Madhav P. Desai
V. Ramgopal Rao
Published in:
Microelectron. Reliab. (2001)
Keyphrases
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cmos technology
gate dielectrics
high speed
circuit design
analog vlsi
silicon on insulator
metal oxide semiconductor
low voltage
nm technology
low power
delay insensitive
wide range
power consumption
real time
field effect transistors
vlsi circuits
analog circuits
high precision
steady state
low cost