Andrew E. Caldwell

Publication Activity (10 Years)

Years Active: 1998-2004
Publications (10 Years): 0

Publications

Andrew E. Caldwell, Hyun-Jin Choi, Andrew B. Kahng, Stefanus Mantik, Miodrag Potkonjak, Gang Qu, Jennifer L. Wong
Effective iterative techniques for fingerprinting design IP. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (2) (2004)
Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov
Hierarchical whitespace allocation in top-down placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22 (11) (2003)
Andrew E. Caldwell, Igor L. Markov
Toward CAD-IP Reuse: A Web Bookshelf of Fundamental Algorithms. IEEE Des. Test Comput. 19 (3) (2002)
Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov
Design and Implementation of Move-Based Heuristics for VLSI Hypergraph Partitioning. ACM J. Exp. Algorithmics 5 (2000)
Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov
Improved algorithms for hypergraph bipartitioning. ASP-DAC (2000)
Andrew E. Caldwell, Yu Cao, Andrew B. Kahng, Farinaz Koushanfar, Hua Lu, Igor L. Markov, Michael Oliver, Dirk Stroobandt, Dennis Sylvester
GTX: the MARCO GSRC technology extrapolation system. DAC (2000)
Marcelo O. Johann, Andrew E. Caldwell, Ricardo Augusto da Luz Reis, Andrew B. Kahng
Admissibility Proofs for the LCS* Algorithm. IBERAMIA-SBIA (2000)
Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov
Optimal partitioners and end-case placers for standard-cell layout. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19 (11) (2000)
Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov
Can recursive bisection alone produce routable placements? DAC (2000)
Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov
Iterative Partitioning with Varying Node Weights. VLSI Design 2000 (3) (2000)
Charles J. Alpert, Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov
Hypergraph partitioning with fixed vertices [VLSI CAD]. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19 (2) (2000)
Andrew E. Caldwell, Andrew B. Kahng, Stefanus Mantik, Igor L. Markov, Alexander Zelikovsky
On wirelength estimations for row-based placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18 (9) (1999)
Andrew E. Caldwell, Hyun-Jin Choi, Andrew B. Kahng, Stefanus Mantik, Miodrag Potkonjak, Gang Qu, Jennifer L. Wong
Effective Iterative Techniques for Fingerprinting Design IP. DAC (1999)
Charles J. Alpert, Andrew E. Caldwell, Tony F. Chan, Dennis J.-H. Huang, Andrew B. Kahng, Igor L. Markov, M. S. Moroz
Analytical Engines are Unnecessary in Top-down Partitioning-based Placement. VLSI Design 1999 (1) (1999)
Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov
Design and Implementation of the Fiduccia-Mattheyses Heuristic for VLSI Netlist Partitioning. ALENEX (1999)
Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov
Optimal partitioners and end-case placers for standard-cell layout. ISPD (1999)
Andrew E. Caldwell, Andrew B. Kahng, Andrew A. Kennings, Igor L. Markov
Hypergraph Partitioning for VLSI CAD: Methodology for Heuristic Development, Experimentation and Reporting. DAC (1999)
Charles J. Alpert, Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov
Partitioning with terminals: a "new" problem and new benchmarks. ISPD (1999)
Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov
Hypergraph Partitioning with Fixed Vertices. DAC (1999)
Andrew E. Caldwell, Andrew B. Kahng, Stefanus Mantik, Igor L. Markov, Alexander Zelikovsky
On wirelength estimations for row-based placement. ISPD (1998)