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Amin Aghighi
ORCID
Publication Activity (10 Years)
Years Active: 2016-2024
Publications (10 Years): 8
Top Topics
Vlsi Circuits
User Interface
High Power
Low Power Consumption
Top Venues
VLSI-SOC
ICECS
MWSCAS
NEWCAS
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Publications
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Mostafa Essawy
,
Kareem Rashed
,
Amin Aghighi
,
Arun Natarajan
A Low-Noise Dual-Path Self-Interference Cancellation Architecture for Watt-Level TX Power Handling in Simultaneous Transmit and Receive.
IEEE J. Solid State Circuits
59 (5) (2024)
Amin Aghighi
,
Behrouz Farhang-Boroujeny
,
Armin Tajalli
Mixed-Mode Signal Processing for Implementing MCMC MIMO Detector.
VLSI-SoC (Selected Papers)
(2020)
Amin Aghighi
,
Massood Tabib-Azar
,
Armin Tajalli
An ULP Self-Supplied Brain Interface Circuit.
VLSI-SOC
(2020)
Amin Aghighi
,
Armin Tajalli
,
Mohammad Taherzadeh-Sani
A Low-Power 10 to 15 Gb/s Common-Gate CTLE Based on Optimized Active Inductors.
VLSI-SOC
(2020)
Amin Aghighi
,
Behrouz Farhang-Boroujeny
,
Armin Tajalli
Energy and Area Efficient Mixed-Mode MCMC MIMO Detector.
VLSI-SOC
(2020)
Amin Aghighi
,
Jacob Atkinson
,
Nickolas Bybee
,
Stuart Anderson
,
Mitchell Crane
,
Anthony Bailey
,
Reuben Morell
,
Ahmed Hassanin
,
Armin Tajalli
CMOS Amplifier Design Based on Extended $g_{m}/I_{D}$ Methodology.
NEWCAS
(2019)
Jacob Atkinson
,
Amin Aghighi
,
Stuart Anderson
,
Anthony Bailey
,
Mitchell Crane
,
Armin Tajalli
Multi-Stage Current-Steering Amplifier Design Based on Extended gm/ID Methodology.
MWSCAS
(2019)
Amin Aghighi
,
Abdul Hafiz Alameh
,
Mohammad Taherzadeh-Sani
,
Frederic Nabki
A 10-Gb/s low-power low-voltage CTLE using gate and bulk driven transistors.
ICECS
(2016)