A 10-Gb/s low-power low-voltage CTLE using gate and bulk driven transistors.
Amin AghighiAbdul Hafiz AlamehMohammad Taherzadeh-SaniFrederic NabkiPublished in: ICECS (2016)
Keyphrases
- cmos technology
- low power
- low voltage
- high speed
- power consumption
- low cost
- power line
- digital signal processing
- high power
- image sensor
- mixed signal
- logic circuits
- power dissipation
- leakage current
- parallel processing
- low power consumption
- real time
- image processing
- gate array
- vlsi circuits
- digital images
- power reduction
- energy efficiency
- ultra low power