Aiwu Ruan

Publication Activity (10 Years)

Years Active: 2011-2020
Publications (10 Years): 2

Top Topics

Quality Degradation

Hardware Implementation

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

Microelectron. Reliab.

J. Electron. Test.

Publications

Aiwu Ruan, Aokai Shi, Liang Qin, Shiyang Xu, Yifan Zhao
A Reinforcement Learning-Based Markov-Decision Process (MDP) Implementation for SRAM FPGAs. IEEE Trans. Circuits Syst. II Express Briefs (10) (2020)
Aiwu Ruan, Haiyang Huang, Jingwu Wang, Yifan Zhao
A Routability-Aware Algorithm for Both Global and Local Interconnect Resource Test and Diagnosis of Xilinx SRAM-FPGAs. J. Electron. Test. 32 (6) (2016)
Aiwu Ruan, W. Tian, B. Ni, K. Wu
A hierarchical switch matrix and interconnect resources test in Virtex-5 FPGA. ISIC (2014)
T. Du, Aiwu Ruan, P. Li, Bairui Jie
A bitstream readback based FPGA test and diagnosis system. ISIC (2014)
Aiwu Ruan, Bairui Jie, Li Wan, Junhao Yang, Chuanyin Xiang, Zujian Zhu, Yu Wang
A bitstream readback-based automatic functional test and diagnosis method for Xilinx FPGAs. Microelectron. Reliab. 54 (8) (2014)
Aiwu Ruan, Junhao Yang, Li Wan, Bairui Jie, Zhiqiang Tian
Insight Into a Generic Interconnect Resource Model for Xilinx Virtex and Spartan Series FPGAs. IEEE Trans. Circuits Syst. II Express Briefs (11) (2013)
Aiwu Ruan, Shi Kang, Yu Wang, Xiao Han, Zujian Zhu, Yongbo Liao, Peng Li
A Built-In Self-Test (BIST) system with non-intrusive TPG and ORA for FPGA test and diagnosis. Microelectron. Reliab. 53 (3) (2013)
Haocheng Huang, Aiwu Ruan, Yongbo Liao, Jianhua Zhu, Lin Wang, Chuanyin Xiang, Pin Li
A new event driven testbench synthesis engine for FPGA emulation. ASICON (2011)