A new event driven testbench synthesis engine for FPGA emulation.
Haocheng HuangAiwu RuanYongbo LiaoJianhua ZhuLin WangChuanyin XiangPin LiPublished in: ASICON (2011)
Keyphrases
- event driven
- real time
- hardware implementation
- publish subscribe
- high speed
- real time image processing
- information delivery
- field programmable gate array
- low cost
- program synthesis
- hardware architecture
- fpga implementation
- texture synthesis
- semi structured
- data acquisition
- parallel hardware
- air fuel ratio
- verilog hdl
- markup language
- hardware architectures