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DEW: A fast level 1 cache simulation approach for embedded processors with FIFO replacement policy.
Mohammad Shihabul Haque
Jorgen Peddersen
Andhi Janapsatya
Sri Parameswaran
Published in:
DATE (2010)
Keyphrases
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embedded processors
replacement policy
web caching
hit rate
single chip
prefetching
parallel implementation
hit ratio
access patterns
hardware and software
buffer management
proxy cache
poisson process
response time
miss ratio
web content
real time
low power
file system