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A Low-Cost Reliability vs. Cost Trade-Off Methodology to Selectively Harden Logic Circuits.
Imran Wali
Bastien Deveautour
Arnaud Virazel
Alberto Bosio
Patrick Girard
Matteo Sonza Reorda
Published in:
J. Electron. Test. (2017)
Keyphrases
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logic circuits
low cost
low power
trade off
gate array
failure rate
power consumption
functional decomposition
high speed
tunnel diode
digital signal processing
logic synthesis
relational databases
dynamic programming
computer systems
flow network