Impact of pipeline in the power performance of tunnel transistor circuits.

Maria J. Avedillo Juan Núñez

Published in: PATMOS (2016)

Keyphrases

high speed
power dissipation
power consumption
low power
power reduction
circuit design
vlsi circuits
chip design
real time
digital circuits
low cost
high impact
power distribution
pipeline architecture
processing pipeline
logic circuits
asynchronous circuits
analog circuits
case study