C
search
search
reviewers
reviewers
feeds
feeds
assignments
assignments
settings
logout
A 2.5Gb/s Multi-Rate 0.25µm CMOS CDR Utilizing a Hybrid Analog/Digital Loop Filter.
Michael H. Perrott
Yunteng Huang
Rex T. Baird
Bruno W. Garlepp
Ligang Zhang
Jerrell P. Hein
Published in:
ISSCC (2006)
Keyphrases
</>
circuit design
mixed signal
cmos image sensor
analog vlsi
low power
high speed
analog to digital converter
loop filter
power consumption
low cost
dynamic range
cmos technology
coding efficiency
high quality
spatial domain
image coding
image compression
multiresolution