Compensation circuit with additional junction sensor to enhance latchup immunity for CMOS integrated circuits.
Hui-Wen TsaiMing-Dou KerPublished in: ECCTD (2015)
Keyphrases
- integrated circuit
- metal oxide semiconductor
- high speed
- circuit design
- analog vlsi
- hardware description language
- image sensor
- printed circuit boards
- delay insensitive
- focal plane
- gallium arsenide
- cmos image sensor
- electron beam
- sensor networks
- vlsi circuits
- low voltage
- chip design
- power consumption
- low cost
- real time
- cmos technology
- multi objective optimization
- sensor data
- single chip
- low power
- evolutionary algorithm
- image processing
- imaging systems