A technique for low power, stuck-at fault diagnosable and reconfigurable scan architecture.
Binod KumarBoda NehruBrajesh PandeyVirendra SinghJaynarayan T. TuduPublished in: EWDTS (2016)
Keyphrases
- low power
- low cost
- vlsi architecture
- power consumption
- high speed
- cmos technology
- single chip
- power reduction
- mixed signal
- high power
- real time
- nm technology
- vlsi circuits
- low power consumption
- wireless transmission
- hardware implementation
- hardware and software
- digital signal processing
- software architecture
- embedded systems
- signal processor
- fault diagnosis
- cmos image sensor
- gate array
- logic circuits
- general purpose
- vlsi implementation
- digital camera