Parametric Faults in Computing-in-Memory Applications of a 4kb Read-Decoupled 8T SRAM Array in 40nm CMOS.

Hao-Chiao Hong Chien-Hung Chen Yu-Wun Chen

Published in: ITC-Asia (2023)

Keyphrases

random access memory
design considerations
embedded dram
low voltage
cmos technology
power consumption
knowledge base
main memory
image sensor
nm technology
flash memory
fault detection
low power
power dissipation
test cases
dynamic random access memory
neural network
memory access
fault diagnosis
low cost