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CLAHE implementation on a low-end FPGA board by high-level synthesis.
Koki Honda
Kaijie Wei
Masatoshi Arai
Hideharu Amano
Published in:
CANDAR (Workshops) (2020)
Keyphrases
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high level synthesis
low end
parallel architecture
hardware implementation
high end
design space exploration
search space
parallel processing
field programmable gate array
multiscale