CLAHE implementation on a low-end FPGA board by high-level synthesis.

Koki Honda Kaijie Wei Masatoshi Arai Hideharu Amano

Published in: CANDAR (Workshops) (2020)

Keyphrases

high level synthesis
low end
parallel architecture
hardware implementation
high end
design space exploration
search space
parallel processing
field programmable gate array
multiscale