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Power gating architecture implementation inside clock period to reduce power.
Debanjali Nath
Priyanka Choudhury
Abhishek Nag
Sambhu Nath Pradhan
Published in:
Int. J. Comput. Aided Eng. Technol. (2014)
Keyphrases
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power consumption
power management
high speed
database
databases
layered architecture
real time
neural network
expert systems
wireless sensor networks
management system
image registration
software architecture
cmos technology
duty cycle