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An on-chip solution for static ADC test and measurement.
Brendan Mullane
Ciaran MacNamee
Vincent O'Brien
Thomas Fleischmann
Published in:
ACM Great Lakes Symposium on VLSI (2009)
Keyphrases
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high speed
neural network
optimal solution
single chip
low cost
test cases
statistical significance
programmable logic
search algorithm
closed form
statistical tests
linear equations
analog vlsi