A buffer planning algorithm for chip-level floorplanning.
Song ChenXianlong HongSheqin DongYuchun MaYici CaiChung-Kuan ChengJun GuPublished in: Sci. China Ser. F Inf. Sci. (2004)
Keyphrases
- dynamic programming
- objective function
- improved algorithm
- computational complexity
- preprocessing
- detection algorithm
- experimental evaluation
- low cost
- tree structure
- optimization algorithm
- k means
- computational cost
- times faster
- path planning
- clustering method
- significant improvement
- computationally efficient
- learning algorithm
- cost function
- theoretical analysis
- expectation maximization
- search space
- matching algorithm
- high accuracy
- search algorithm
- causal graph
- optimal plans