Design of Low Power 4-Bit 400MS/s Standard Cell Based Flash ADC.
S. M. MayurSiddharth R. K.Kumar Y. B. NithinM. H. VasanthaPublished in: ISVLSI (2017)
Keyphrases
- low power
- single chip
- analog to digital converter
- power consumption
- low cost
- mixed signal
- high speed
- logic circuits
- low power consumption
- digital signal processing
- vlsi architecture
- multi channel
- gate array
- ultra low power
- cmos technology
- wireless transmission
- vlsi circuits
- nm technology
- power reduction
- power dissipation
- cmos image sensor
- wireless sensor networks