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S. M. Mayur
Publication Activity (10 Years)
Years Active: 2016-2017
Publications (10 Years): 2
Top Topics
Low Power
Nm Technology
Low Power Consumption
Analog To Digital Converter
Top Venues
ISVLSI
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Publications
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S. M. Mayur
,
Siddharth R. K.
,
Kumar Y. B. Nithin
,
M. H. Vasantha
Design of Low Power 4-Bit 400MS/s Standard Cell Based Flash ADC.
ISVLSI
(2017)
S. M. Mayur
,
Siddharth R. K.
,
Kumar Y. B. Nithin
,
M. H. Vasantha
Design of Low Power 5-Bit Hybrid Flash ADC.
ISVLSI
(2016)