A 1-bit full adder using CNFET based dual chirality high speed domino logic.
Sandeep GargTarun Kumar GuptaAmit Kumar PandeyPublished in: Int. J. Circuit Theory Appl. (2020)
Keyphrases
- high speed
- shift register
- logic circuits
- low power
- random access memory
- logical operations
- logic programming
- bit parallel
- modal logic
- predicate logic
- automated reasoning
- real time
- classical logic
- data flow
- pattern matching
- delay insensitive
- proof theory
- flip flops
- multi valued
- digital circuits
- probabilistic logic
- primal dual
- power consumption
- knowledge representation
- learning algorithm
- data sets