A Multibit MAC Scheme using Switched Capacitor based 3C Multiplier for Analog Compute In-Memory Architecture.
Neha GuptaAshish JoshiDinesh KushwahaVinod MenezesRashmi SachanSudeb DasguptaAnand BulusuPublished in: ICECS 2022 (2022)
Keyphrases
- vlsi architecture
- parallel architecture
- vlsi implementation
- analog vlsi
- memory space
- memory management
- hardware implementation
- management system
- floating point
- memory requirements
- processing elements
- memory access
- random access
- level parallelism
- software architecture
- memory hierarchy
- real time
- pruning power
- analog to digital converter
- successive approximation
- instruction set
- hardware architecture
- bloom filter
- associative memory
- main memory
- peer to peer