A delay circuit with 4-terminal magnetic-random-access-memory device for power-efficient time- domain signal processing.
Ryusuke NebashiNoboru SakimuraHiroaki HonjoAyuka MoriokaYukihide TsujiKunihiko IshiharaKeiichi TokutomeSadahiko MiuraShunsuke FukamiKeizo KinoshitaTakahiro HanyuTetsuo EndohNaoki KasaiHideo OhnoTadahiko SugibayashiPublished in: ISCAS (2014)