A Feature Associative Processor for Image Recognition Based on A-D merged Architecture.
Atsushi IwataMakoto NagataHiroyuki NakamotoNoriaki TakedaMitsuru HommaHiroto HigashiTakashi MoriePublished in: VLSI (1999)
Keyphrases
- image recognition
- pattern recognition
- image classification
- face recognition
- associative memory
- multi processor
- instruction set
- industry standard
- parallel architecture
- management system
- image processing
- multi core processors
- memory management
- single chip
- processing elements
- parallel processing
- high speed
- correlation filters
- multi instance learning
- feature vectors
- image retrieval
- real time
- computation intensive