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, 16-bank, 1-Gb DDR SDRAM with hybrid bitline architecture.

Toshiaki KirihataGerhard MuellerBrian JiGerd FrankowskyJohn M. RossHartmud TerletzkiDmitry G. NetisOliver WeinfurtnerDavid R. HansonGabriel DanielLouis Lu-Chen HsuDaniel W. StoraskaArmin M. ReithMarco A. HugKevin P. GuayManfred SelzPeter PoechmuellerHeinz HoenigschmidMatthew R. Wordeman
Published in: IEEE J. Solid State Circuits (1999)
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