Software synthesis from synchronous specifications using logic simulation techniques.
Yunjian JiangRobert K. BraytonPublished in: DAC (2002)
Keyphrases
- delay insensitive
- simulation environment
- written in natural language
- software development
- model checker
- bounded model checking
- software systems
- control flow
- simulation software
- software tools
- simulation model
- model checking
- formal specification
- logic synthesis
- modal logic
- linear temporal logic
- computer systems
- software requirements
- asynchronous circuits
- simulation tool
- formal language
- functional requirements
- test suite
- automated reasoning
- high level
- controller synthesis
- functional programs
- multi agent systems
- software maintenance
- transition systems
- temporal logic
- digital circuits
- hardware software
- test cases
- reactive systems
- multi valued
- neural network
- classical logic