A 900-MS/s SAR-Based Time-Interleaved ADC With a Fully Programmable Interleaving Factor and On-Chip Scalable Background Calibrations.
Gabriele BèAngelo ParisiLuca BertulessiLuca RicciLorenzo ScalettiMario MercandelliAndrea L. LacaitaSalvatore LevantinoCarlo SamoriAndrea BonfantiPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2022)
Keyphrases
- single chip
- low cost
- low power
- signal processor
- digital signal processors
- high speed
- programmable logic
- cmos image sensor
- general purpose
- synthetic aperture radar
- analog vlsi
- signal processing
- chip design
- memory efficient
- image sensor
- sar imagery
- foreground and background
- low latency
- image processing
- high density
- sar images
- operating system
- multiscale
- image segmentation