REDEFINE: Runtime reconfigurable polymorphic ASIC.
Mythri AlleKeshavan VaradarajanAlexander FellC. Ramesh ReddyJoseph NimmySaptarsi DasPrasenjit BiswasJugantor ChetiaAdarsha RaoS. K. NandyRanjani NarayanPublished in: ACM Trans. Embed. Comput. Syst. (2009)
Keyphrases
- hardware implementation
- integrated circuit
- hardware architecture
- low cost
- field programmable gate array
- efficient implementation
- application specific
- design methodology
- signal processing
- reconfigurable architecture
- general purpose
- single chip
- databases
- website
- artificial intelligence
- circuit design
- fine grain
- dynamic reconfiguration
- database