A Genuine Power-Gatable Reconfigurable Logic Chip with FeRAM Cells.
Masahiro IidaMasahiro KogaKazuki InoueMotoki AmagasakiYoshinobu IchidaMitsuro SajiJun IidaToshinori SueyoshiPublished in: IEICE Trans. Electron. (2011)
Keyphrases
- chip design
- low cost
- ibm power processor
- power consumption
- power dissipation
- micron cmos
- high speed
- physical design
- power reduction
- random access memory
- design methodology
- high density
- reconfigurable architecture
- vlsi implementation
- modal logic
- fine grain
- power management
- low power
- memory subsystem
- classical logic
- field programmable gate array
- application specific integrated circuits
- computational power