3 gb/s AC coupled chip-to-chip communication using a low swing pulse receiver.
Lei LuoJohn M. WilsonStephen E. MickJian XuLiang ZhangPaul D. FranzonPublished in: IEEE J. Solid State Circuits (2006)
Keyphrases
- high speed
- low cost
- high bandwidth
- high density
- single chip
- analog vlsi
- circuit design
- low power
- programmable logic
- vlsi implementation
- physical design
- multithreading
- communication protocol
- evolvable hardware
- host computer
- end to end
- image sensor
- modular design
- level parallelism
- communication systems
- chip design
- functional verification